Line data Source code
1 : /*
2 : * Copyright (c) 2016 Cisco and/or its affiliates.
3 : * Licensed under the Apache License, Version 2.0 (the "License");
4 : * you may not use this file except in compliance with the License.
5 : * You may obtain a copy of the License at:
6 : *
7 : * http://www.apache.org/licenses/LICENSE-2.0
8 : *
9 : * Unless required by applicable law or agreed to in writing, software
10 : * distributed under the License is distributed on an "AS IS" BASIS,
11 : * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 : * See the License for the specific language governing permissions and
13 : * limitations under the License.
14 : */
15 : #include <fcntl.h>
16 : #include <vppinfra/clib.h>
17 : #include <vppinfra/format.h>
18 : #include <vppinfra/cpu.h>
19 :
20 : #define foreach_x86_cpu_uarch \
21 : _ (0x06, 0x9e, "Kaby Lake", "Kaby Lake DT/H/S/X") \
22 : _ (0x06, 0x9c, "Tremont", "Jasper Lake") \
23 : _ (0x06, 0x9a, "Alder Lake", "Alder Lake L") \
24 : _ (0x06, 0x97, "Alder Lake", "Alder Lake") \
25 : _ (0x06, 0x96, "Tremont", "Elkhart Lake") \
26 : _ (0x06, 0x8f, "Sapphire Rapids", "Sapphire Rapids X") \
27 : _ (0x06, 0x8e, "Kaby Lake", "Kaby Lake Y/U") \
28 : _ (0x06, 0x8c, "Tiger Lake", "Tiger Lake U") \
29 : _ (0x06, 0x86, "Tremont", "Jacobsville") \
30 : _ (0x06, 0x85, "Knights Mill", "Knights Mill") \
31 : _ (0x06, 0x7e, "Ice Lake", "Ice Lake U") \
32 : _ (0x06, 0x7d, "Ice Lake", "Ice Lake Y") \
33 : _ (0x06, 0x7a, "Goldmont Plus", "Gemini Lake") \
34 : _ (0x06, 0x6c, "Ice Lake", "Ice Lake SP") \
35 : _ (0x06, 0x6a, "Ice Lake", "Ice Lake DE") \
36 : _ (0x06, 0x66, "Cannon Lake", "Cannon Lake U") \
37 : _ (0x06, 0x5f, "Goldmont", "Denverton") \
38 : _ (0x06, 0x5e, "Skylake", "Skylake DT/H/S") \
39 : _ (0x06, 0x5c, "Goldmont", "Apollo Lake") \
40 : _ (0x06, 0x5a, "Silvermont", "Moorefield") \
41 : _ (0x06, 0x57, "Knights Landing", "Knights Landing") \
42 : _ (0x06, 0x56, "Broadwell", "Broadwell DE") \
43 : _ (0x06, 0x55, "Skylake", "Skylake X/SP") \
44 : _ (0x06, 0x4f, "Broadwell", "Broadwell EP/EX") \
45 : _ (0x06, 0x4e, "Skylake", "Skylake Y/U") \
46 : _ (0x06, 0x4d, "Silvermont", "Rangeley") \
47 : _ (0x06, 0x4c, "Airmont", "Braswell") \
48 : _ (0x06, 0x47, "Broadwell", "Broadwell H") \
49 : _ (0x06, 0x46, "Haswell", "Crystalwell") \
50 : _ (0x06, 0x45, "Haswell", "Haswell ULT") \
51 : _ (0x06, 0x3f, "Haswell", "Haswell E") \
52 : _ (0x06, 0x3e, "Ivy Bridge", "Ivy Bridge E/EN/EP") \
53 : _ (0x06, 0x3d, "Broadwell", "Broadwell U") \
54 : _ (0x06, 0x3c, "Haswell", "Haswell") \
55 : _ (0x06, 0x3a, "Ivy Bridge", "IvyBridge") \
56 : _ (0x06, 0x37, "Silvermont", "BayTrail") \
57 : _ (0x06, 0x36, "Saltwell", "Cedarview,Centerton") \
58 : _ (0x06, 0x35, "Saltwell", "Cloverview") \
59 : _ (0x06, 0x2f, "Westmere", "Westmere EX") \
60 : _ (0x06, 0x2e, "Nehalem", "Nehalem EX") \
61 : _ (0x06, 0x2d, "Sandy Bridge", "SandyBridge E/EN/EP") \
62 : _ (0x06, 0x2c, "Westmere", "Westmere EP/EX,Gulftown") \
63 : _ (0x06, 0x2a, "Sandy Bridge", "Sandy Bridge") \
64 : _ (0x06, 0x27, "Saltwell", "Medfield") \
65 : _ (0x06, 0x26, "Bonnell", "Tunnel Creek") \
66 : _ (0x06, 0x25, "Westmere", "Arrandale,Clarksdale") \
67 : _ (0x06, 0x1e, "Nehalem", "Clarksfield,Lynnfield,Jasper Forest") \
68 : _ (0x06, 0x1d, "Penryn", "Dunnington") \
69 : _ (0x06, 0x1c, "Bonnell", "Pineview,Silverthorne") \
70 : _ (0x06, 0x1a, "Nehalem", "Nehalem EP,Bloomfield)") \
71 : _ (0x06, 0x17, "Penryn", "Yorkfield,Wolfdale,Penryn,Harpertown")
72 :
73 : /* _(implementor-id, part-id, vendor-name, cpu-name, show CPU pass as string) */
74 : #define foreach_aarch64_cpu_uarch \
75 : _ (0x41, 0xd03, "ARM", "Cortex-A53", 0) \
76 : _ (0x41, 0xd07, "ARM", "Cortex-A57", 0) \
77 : _ (0x41, 0xd08, "ARM", "Cortex-A72", 0) \
78 : _ (0x41, 0xd09, "ARM", "Cortex-A73", 0) \
79 : _ (0x41, 0xd0a, "ARM", "Cortex-A75", 0) \
80 : _ (0x41, 0xd0b, "ARM", "Cortex-A76", 0) \
81 : _ (0x41, 0xd0c, "ARM", "Neoverse-N1", 0) \
82 : _ (0x41, 0xd49, "ARM", "Neoverse-N2", 0) \
83 : _ (0x41, 0xd4a, "ARM", "Neoverse-E1", 0) \
84 : _ (0x43, 0x0a1, "Marvell", "THUNDERX CN88XX", 0) \
85 : _ (0x43, 0x0a2, "Marvell", "OCTEON TX CN81XX", 0) \
86 : _ (0x43, 0x0a3, "Marvell", "OCTEON TX CN83XX", 0) \
87 : _ (0x43, 0x0af, "Marvell", "THUNDERX2 CN99XX", 1) \
88 : _ (0x43, 0x0b1, "Marvell", "OCTEON TX2 CN98XX", 1) \
89 : _ (0x43, 0x0b2, "Marvell", "OCTEON TX2 CN96XX", 1)
90 :
91 : __clib_export u8 *
92 1 : format_cpu_uarch (u8 * s, va_list * args)
93 : {
94 : #if __x86_64__
95 : u32 __attribute__ ((unused)) eax, ebx, ecx, edx;
96 : u8 model, family, stepping;
97 1 : u8 amd_vendor = 0;
98 :
99 1 : if (__get_cpuid (0, &eax, &ebx, &ecx, &edx) == 0)
100 0 : return format (s, "unknown (missing cpuid)");
101 :
102 1 : if (amd_vendor (ebx, ecx, edx))
103 0 : amd_vendor = 1;
104 :
105 1 : if (__get_cpuid (1, &eax, &ebx, &ecx, &edx) == 0)
106 0 : return format (s, "unknown (missing cpuid)");
107 :
108 1 : stepping = eax & 0x0f;
109 1 : if (amd_vendor)
110 : {
111 0 : family = ((eax >> 8) & 0x0f);
112 0 : model = ((eax >> 4) & 0x0f);
113 0 : if (family >= 0xf)
114 : {
115 0 : family = family + ((eax >> 20) & 0xf);
116 0 : model = (model | ((eax >> 12) & 0xf0));
117 : }
118 0 : return format (s, "Zen (family 0x%02x model 0x%02x)", family, model);
119 : }
120 : else
121 : {
122 1 : model = ((eax >> 4) & 0x0f) | ((eax >> 12) & 0xf0);
123 1 : family = (eax >> 8) & 0x0f;
124 : }
125 :
126 : #define _(f,m,a,c) if ((model == m) && (family == f)) return \
127 : format(s, "[0x%x] %s ([0x%02x] %s) stepping 0x%x", f, a, m, c, stepping);
128 1 : foreach_x86_cpu_uarch
129 : #undef _
130 0 : return format (s, "unknown (family 0x%02x model 0x%02x)", family, model);
131 :
132 : #elif __aarch64__
133 : unformat_input_t input;
134 : u32 implementer, primary_part_number, variant, revision;
135 :
136 : if (unformat_init_file (&input, "/proc/cpuinfo"))
137 : {
138 : while (unformat_check_input (&input) != UNFORMAT_END_OF_INPUT)
139 : {
140 : if (unformat (&input, "CPU implementer%_: 0x%x", &implementer))
141 : ;
142 : else if (unformat (&input, "CPU part%_: 0x%x", &primary_part_number))
143 : ;
144 : else if (unformat (&input, "CPU variant%_: 0x%x", &variant))
145 : ;
146 : else if (unformat (&input, "CPU revision%_: %u", &revision))
147 : ;
148 : else
149 : unformat_skip_line (&input);
150 : }
151 : unformat_free (&input);
152 : }
153 : else
154 : return format (s, "unknown");
155 :
156 : #define _(i,p,a,c,_format) if ((implementer == i) && (primary_part_number == p)){ \
157 : if (_format)\
158 : return format(s, "%s (%s PASS %c%u)", a, c, 'A'+variant, revision);\
159 : else {\
160 : if (implementer == 0x43)\
161 : variant++; \
162 : return format (s, "%s (%s PASS %u.%u)", a, c, variant, revision);}}
163 :
164 : foreach_aarch64_cpu_uarch
165 : #undef _
166 : return format (s, "unknown (implementer 0x%02x part 0x%03x PASS %u.%u)",
167 : implementer, primary_part_number, variant, revision);
168 :
169 : #else /* ! __x86_64__ */
170 : return format (s, "unknown");
171 : #endif
172 : }
173 :
174 : __clib_export u8 *
175 1 : format_cpu_model_name (u8 * s, va_list * args)
176 : {
177 : #if __x86_64__
178 : u32 __attribute__ ((unused)) eax, ebx, ecx, edx;
179 1 : u8 *name = 0;
180 : u32 *name_u32;
181 :
182 1 : if (__get_cpuid (1, &eax, &ebx, &ecx, &edx) == 0)
183 0 : return format (s, "unknown (missing cpuid)");
184 :
185 1 : __get_cpuid (0x80000000, &eax, &ebx, &ecx, &edx);
186 1 : if (eax < 0x80000004)
187 0 : return format (s, "unknown (missing ext feature)");
188 :
189 1 : vec_validate (name, 48);
190 1 : name_u32 = (u32 *) name;
191 :
192 1 : __get_cpuid (0x80000002, &eax, &ebx, &ecx, &edx);
193 1 : name_u32[0] = eax;
194 1 : name_u32[1] = ebx;
195 1 : name_u32[2] = ecx;
196 1 : name_u32[3] = edx;
197 :
198 1 : __get_cpuid (0x80000003, &eax, &ebx, &ecx, &edx);
199 1 : name_u32[4] = eax;
200 1 : name_u32[5] = ebx;
201 1 : name_u32[6] = ecx;
202 1 : name_u32[7] = edx;
203 :
204 1 : __get_cpuid (0x80000004, &eax, &ebx, &ecx, &edx);
205 1 : name_u32[8] = eax;
206 1 : name_u32[9] = ebx;
207 1 : name_u32[10] = ecx;
208 1 : name_u32[11] = edx;
209 :
210 1 : s = format (s, "%s", name);
211 1 : vec_free (name);
212 1 : return s;
213 :
214 : #elif defined(__aarch64__)
215 : return format (s, "armv8");
216 : #else /* ! __x86_64__ */
217 : return format (s, "unknown");
218 : #endif
219 : }
220 :
221 : #if defined(__x86_64__) || defined(__aarch64__)
222 : static inline char const *
223 16 : flag_skip_prefix (char const *flag, const char *pfx, int len)
224 : {
225 16 : if (0 == strncmp (flag, pfx, len - 1))
226 1 : return flag + len - 1;
227 15 : return flag;
228 : }
229 : #endif
230 :
231 : __clib_export u8 *
232 1 : format_cpu_flags (u8 *s, va_list *args)
233 : {
234 : #if defined(__x86_64__)
235 : #define _(flag, func, reg, bit) \
236 : if (clib_cpu_supports_##flag ()) \
237 : s = format (s, "%s ", flag_skip_prefix (#flag, "x86_", sizeof ("x86_")));
238 1 : foreach_x86_64_flags return s;
239 : #undef _
240 : #elif defined(__aarch64__)
241 : #define _(flag, bit) \
242 : if (clib_cpu_supports_##flag ()) \
243 : s = format (s, "%s ", \
244 : flag_skip_prefix (#flag, "aarch64_", sizeof ("aarch64_")));
245 : foreach_aarch64_flags return s;
246 : #undef _
247 : #else /* ! ! __x86_64__ && ! __aarch64__ */
248 : return format (s, "unknown");
249 : #endif
250 : }
251 :
252 : __clib_export u32
253 85653100 : clib_get_current_cpu_id ()
254 : {
255 : unsigned cpu, node;
256 85653100 : syscall (__NR_getcpu, &cpu, &node, 0);
257 85654200 : return cpu;
258 : }
259 :
260 : __clib_export u32
261 1205 : clib_get_current_numa_node ()
262 : {
263 : unsigned cpu, node;
264 1205 : syscall (__NR_getcpu, &cpu, &node, 0);
265 1205 : return node;
266 : }
267 :
268 : __clib_export u8 *
269 0 : format_march_variant (u8 *s, va_list *args)
270 : {
271 0 : clib_march_variant_type_t t = va_arg (*args, clib_march_variant_type_t);
272 0 : char *variants[] = { [0] = "default",
273 : #define _(s, n) [CLIB_MARCH_VARIANT_TYPE_##s] = n,
274 : foreach_march_variant
275 : #undef _
276 : };
277 0 : return format (s, "%s", variants[t]);
278 : }
279 :
280 : #ifdef __aarch64__
281 :
282 : __clib_export const clib_cpu_info_t *
283 : clib_get_cpu_info ()
284 : {
285 : static int first_run = 1;
286 : static clib_cpu_info_t info = {};
287 : if (first_run)
288 : {
289 : FILE *fp = fopen ("/proc/cpuinfo", "r");
290 : char buf[128];
291 :
292 : if (!fp)
293 : return 0;
294 :
295 : while (!feof (fp))
296 : {
297 : if (!fgets (buf, sizeof (buf), fp))
298 : break;
299 : buf[127] = '\0';
300 : if (strstr (buf, "CPU part"))
301 : info.aarch64.part_num =
302 : strtol (memchr (buf, ':', 128) + 2, NULL, 0);
303 :
304 : if (strstr (buf, "CPU implementer"))
305 : info.aarch64.implementer =
306 : strtol (memchr (buf, ':', 128) + 2, NULL, 0);
307 : }
308 : fclose (fp);
309 :
310 : first_run = 0;
311 : }
312 : return &info;
313 : }
314 :
315 : #endif
|
