Line data    Source code

       1             : /*
       2             :  * Copyright (c) 2020 Cisco and/or its affiliates.
       3             :  * Licensed under the Apache License, Version 2.0 (the "License");
       4             :  * you may not use this file except in compliance with the License.
       5             :  * You may obtain a copy of the License at:
       6             :  *
       7             :  *     http://www.apache.org/licenses/LICENSE-2.0
       8             :  *
       9             :  * Unless required by applicable law or agreed to in writing, software
      10             :  * distributed under the License is distributed on an "AS IS" BASIS,
      11             :  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
      12             :  * See the License for the specific language governing permissions and
      13             :  * limitations under the License.
      14             :  */
      15             : 
      16             : #include <vnet/vnet.h>
      17             : #include <perfmon/perfmon.h>
      18             : #include <perfmon/intel/core.h>
      19             : #include <perfmon/intel/dispatch_wrapper.h>
      20             : #include <linux/perf_event.h>
      21             : 
      22             : static perfmon_event_t events[] = {
      23             : #define _(event, umask, edge, any, inv, cmask, n, suffix, desc)               \
      24             :   [INTEL_CORE_E_##n##_##suffix] = { .type = PERF_TYPE_RAW,                    \
      25             :                                     .config = PERF_INTEL_CODE (               \
      26             :                                       event, umask, edge, any, inv, cmask),   \
      27             :                                     .name = #n "." #suffix,                   \
      28             :                                     .description = desc,                      \
      29             :                                     .implemented = 1,                         \
      30             :                                     .exclude_kernel = 1 },
      31             : 
      32             :   foreach_perf_intel_core_event foreach_perf_intel_peusdo_event
      33             :     foreach_perf_intel_tremont_event
      34             : 
      35             : #undef _
      36             : };
      37             : 
      38             : u8 *
      39           0 : format_intel_core_config (u8 *s, va_list *args)
      40             : {
      41           0 :   u64 config = va_arg (*args, u64);
      42             :   u8 v;
      43             : 
      44           0 :   s = format (s, "event=0x%02x, umask=0x%02x", config & 0xff,
      45           0 :               (config >> 8) & 0xff);
      46             : 
      47           0 :   if ((v = (config >> 18) & 1))
      48           0 :     s = format (s, ", edge=%u", v);
      49             : 
      50           0 :   if ((v = (config >> 19) & 1))
      51           0 :     s = format (s, ", pc=%u", v);
      52             : 
      53           0 :   if ((v = (config >> 21) & 1))
      54           0 :     s = format (s, ", any=%u", v);
      55             : 
      56           0 :   if ((v = (config >> 23) & 1))
      57           0 :     s = format (s, ", inv=%u", v);
      58             : 
      59           0 :   if ((v = (config >> 24) & 0xff))
      60           0 :     s = format (s, ", cmask=0x%02x", v);
      61             : 
      62             :   /* show the raw config, for convenience sake */
      63           0 :   if (!((config >> 16) & 0xffff))
      64           0 :     s = format (s, ", raw=r%x", config & 0xffff);
      65             : 
      66           0 :   return s;
      67             : }
      68             : 
      69             : static clib_error_t *
      70         559 : intel_core_init (vlib_main_t *vm, perfmon_source_t *src)
      71             : {
      72             :   u32 eax, ebx, ecx, edx;
      73         559 :   if (__get_cpuid (0, &eax, &ebx, &ecx, &edx) == 0)
      74           0 :     return clib_error_return (0, "unknown CPU (missing cpuid)");
      75             : 
      76             :   // GenuineIntel
      77         559 :   if (ebx != 0x756e6547 || ecx != 0x6c65746e || edx != 0x49656e69)
      78           0 :     return clib_error_return (0, "not a IA-32 CPU");
      79         559 :   return 0;
      80             : }
      81             : 
      82             : perfmon_event_type_t
      83       41366 : intel_core_get_event_type (u32 event)
      84             : {
      85       41366 :   u64 config = events[event].config;
      86       41366 :   u8 eventcode = (config & 0xFF);
      87       41366 :   u8 umask = ((config >> 8) & 0xFF);
      88             : 
      89       41366 :   if (!eventcode) /* is fixed or pseudo */
      90             :     {
      91        8385 :       if (umask >= 0x80) /* is pseudo */
      92        6708 :         return PERFMON_EVENT_TYPE_PSEUDO;
      93             :       else /* is fixed */
      94        1677 :         return PERFMON_EVENT_TYPE_FIXED;
      95             :     }
      96             :   else
      97       32981 :     return PERFMON_EVENT_TYPE_GENERAL;
      98             : }
      99             : 
     100             : static u8
     101        8944 : is_enough_counters (perfmon_bundle_t *b)
     102             : {
     103             :   u8 bl[PERFMON_EVENT_TYPE_MAX];
     104             :   u8 cpu[PERFMON_EVENT_TYPE_MAX];
     105             : 
     106        8944 :   clib_memset (&bl, 0, sizeof (bl));
     107        8944 :   clib_memset (&cpu, 0, sizeof (cpu));
     108             : 
     109             :   /* how many does this uarch support */
     110        8944 :   if (!clib_get_pmu_counter_count (&cpu[PERFMON_EVENT_TYPE_FIXED],
     111             :                                    &cpu[PERFMON_EVENT_TYPE_GENERAL]))
     112           0 :     return 0;
     113             : 
     114             :   /* how many does the bundle require */
     115       55900 :   for (u16 i = 0; i < b->n_events; i++)
     116             :     {
     117             :       /* if source allows us to identify events, otherwise assume general */
     118       46956 :       if (b->src->get_event_type)
     119       41366 :         bl[b->src->get_event_type (b->events[i])]++;
     120             :       else
     121        5590 :         bl[PERFMON_EVENT_TYPE_GENERAL]++;
     122             :     }
     123             : 
     124             :   /* consciously ignoring pseudo events here */
     125       14534 :   return cpu[PERFMON_EVENT_TYPE_GENERAL] >= bl[PERFMON_EVENT_TYPE_GENERAL] &&
     126        5590 :          cpu[PERFMON_EVENT_TYPE_FIXED] >= bl[PERFMON_EVENT_TYPE_FIXED];
     127             : }
     128             : 
     129             : u8
     130        8944 : intel_bundle_supported (perfmon_bundle_t *b)
     131             : {
     132        8944 :   perfmon_cpu_supports_t *supports = b->cpu_supports;
     133             : 
     134        8944 :   if (!is_enough_counters (b))
     135        3354 :     return 0;
     136             : 
     137        5590 :   if (!b->cpu_supports)
     138        2795 :     return 1;
     139             : 
     140        5590 :   for (int i = 0; i < b->n_cpu_supports; ++i)
     141        2795 :     if (supports[i].cpu_supports ())
     142           0 :       return 1;
     143             : 
     144        2795 :   return 0;
     145             : }
     146             : 
     147         559 : PERFMON_REGISTER_SOURCE (intel_core) = {
     148             :   .name = "intel-core",
     149             :   .description = "intel arch core events",
     150             :   .events = events,
     151             :   .n_events = ARRAY_LEN (events),
     152             :   .init_fn = intel_core_init,
     153             :   .get_event_type = intel_core_get_event_type,
     154             :   .format_config = format_intel_core_config,
     155             :   .bundle_support = intel_bundle_supported,
     156             :   .config_dispatch_wrapper = intel_config_dispatch_wrapper,
     157             : };