LCOV - code coverage report

Current view: top level - vppinfra - tw_timer_template.c (source / functions) Hit Total Coverage Test: coverage-filtered.info Lines: 217 279 77.8 % Date: 2023-07-05 22:20:52 Functions: 31 74 41.9 %

Function Name	Hit count
make_internal_timer_handle_16t_1w_2048sl	0
make_internal_timer_handle_16t_2w_512sl	600
make_internal_timer_handle_1t_3w_1024sl_ov	1660860
make_internal_timer_handle_2t_1w_2048sl	5
make_internal_timer_handle_2t_2w_512sl	0
make_internal_timer_handle_4t_3w_256sl	0
make_internal_timer_handle_tcp_twsl	3109
timer_add	1717102
timer_addhead	2057270
timer_remove	482284
tw_timer_expire_timers_16t_1w_2048sl	0
tw_timer_expire_timers_16t_2w_512sl	28287
tw_timer_expire_timers_1t_3w_1024sl_ov	534786000
tw_timer_expire_timers_2t_1w_2048sl	197103
tw_timer_expire_timers_2t_2w_512sl	0
tw_timer_expire_timers_4t_3w_256sl	0
tw_timer_expire_timers_internal_16t_1w_2048sl	0
tw_timer_expire_timers_internal_16t_2w_512sl	28287
tw_timer_expire_timers_internal_1t_3w_1024sl_ov	534792000
tw_timer_expire_timers_internal_2t_1w_2048sl	197103
tw_timer_expire_timers_internal_2t_2w_512sl	0
tw_timer_expire_timers_internal_4t_3w_256sl	0
tw_timer_expire_timers_internal_tcp_twsl	74945300
tw_timer_expire_timers_tcp_twsl	74946600
tw_timer_expire_timers_vec_16t_1w_2048sl	0
tw_timer_expire_timers_vec_16t_2w_512sl	0
tw_timer_expire_timers_vec_1t_3w_1024sl_ov	6659
tw_timer_expire_timers_vec_2t_1w_2048sl	0
tw_timer_expire_timers_vec_2t_2w_512sl	0
tw_timer_expire_timers_vec_4t_3w_256sl	0
tw_timer_expire_timers_vec_tcp_twsl	0
tw_timer_first_expires_in_ticks_1t_3w_1024sl_ov	95956500
tw_timer_handle_is_free_16t_1w_2048sl	0
tw_timer_handle_is_free_16t_2w_512sl	0
tw_timer_handle_is_free_1t_3w_1024sl_ov	438424
tw_timer_handle_is_free_2t_1w_2048sl	0
tw_timer_handle_is_free_2t_2w_512sl	0
tw_timer_handle_is_free_4t_3w_256sl	0
tw_timer_handle_is_free_tcp_twsl	0
tw_timer_start_16t_1w_2048sl	0
tw_timer_start_16t_2w_512sl	600
tw_timer_start_1t_3w_1024sl_ov	1660860
tw_timer_start_2t_1w_2048sl	5
tw_timer_start_2t_2w_512sl	0
tw_timer_start_4t_3w_256sl	0
tw_timer_start_tcp_twsl	3109
tw_timer_stop_16t_1w_2048sl	0
tw_timer_stop_16t_2w_512sl	437
tw_timer_stop_1t_3w_1024sl_ov	426349
tw_timer_stop_2t_1w_2048sl	0
tw_timer_stop_2t_2w_512sl	0
tw_timer_stop_4t_3w_256sl	0
tw_timer_stop_tcp_twsl	2965
tw_timer_update_16t_1w_2048sl	0
tw_timer_update_16t_2w_512sl	0
tw_timer_update_1t_3w_1024sl_ov	13655
tw_timer_update_2t_1w_2048sl	0
tw_timer_update_2t_2w_512sl	0
tw_timer_update_4t_3w_256sl	0
tw_timer_update_tcp_twsl	38878
tw_timer_wheel_free_16t_1w_2048sl	0
tw_timer_wheel_free_16t_2w_512sl	0
tw_timer_wheel_free_1t_3w_1024sl_ov	0
tw_timer_wheel_free_2t_1w_2048sl	0
tw_timer_wheel_free_2t_2w_512sl	0
tw_timer_wheel_free_4t_3w_256sl	0
tw_timer_wheel_free_tcp_twsl	0
tw_timer_wheel_init_16t_1w_2048sl	0
tw_timer_wheel_init_16t_2w_512sl	559
tw_timer_wheel_init_1t_3w_1024sl_ov	1723
tw_timer_wheel_init_2t_1w_2048sl	51
tw_timer_wheel_init_2t_2w_512sl	0
tw_timer_wheel_init_4t_3w_256sl	0
tw_timer_wheel_init_tcp_twsl	70

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